Logical Effort Calculation

PMOS, NMOS Sizing

1. Why is W to L of PMOS is higher than that of NMOS?                         or

2. What are the reasons behind PMOS and NMOS sizing?

Ans: i) PMOS hole mobility is lesser than NMOS electron mobility (approx 1:3)

ii) Since hole mobility is lesser than electron mobility, PMOS width must be greater to compensate and make the pull-up network stronger

iii) If W to L of PMOS is same as the corresponding NMOS, the charging time of the output node would be higher than that of the discharging time (related to NMOS pull-down network)

iv) Sizing is done to maintain equal (or similar) rise and fall times at the output

Note: Usually, W to L to PMOS is 2 or 3 times the W to L of NMOS